Commit aac9e2b1 authored by Khoi Lam's avatar Khoi Lam 💬
Browse files

pulling Prof. Marchiori's codeMerge branch 'main' of gitlab.bucknell.edu:kal038/pyriscv into main

parents 2c61f418 881241f6
......@@ -3,6 +3,8 @@ import itertools
from pydigital.memory import readmemh
from pydigital.register import Register
from riscv_isa import Instruction
from mux import make_mux2
from riscv_isa.decoder import control
# the PC register
PC = Register()
......@@ -12,6 +14,8 @@ PC = Register()
# imem = readmemh('riscv_isa/programs/fetch_test.hex',
# word_size = 4, byteorder = 'big')
op1_mux = make_mux2(lambda: instr.rs1, lambda: None)
def display():
if pc_val == None:
return "PC: xxxxxxxx, IR: xxxxxxxx"
......@@ -35,6 +39,9 @@ for t in itertools.count():
# access instruction memory
instr = Instruction(imem[pc_val], pc_val)
alu_in1 = op1_mux(control[instr.instr_name].op1_sel)
# print one line at the end of the clock cycle
print(f"{t:20d}:", display())
......
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