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Christina Yu
pyriscv
Commits
563779f2
Commit
563779f2
authored
Nov 18, 2021
by
Christina Yu
Browse files
lab4 fixed
parent
ba85409e
Changes
2
Hide whitespace changes
Inline
Side-by-side
onestage_pt1.py
View file @
563779f2
...
...
@@ -26,7 +26,7 @@ def display():
if
pc_val
==
None
:
return
"PC: xxxxxxxx, IR: xxxxxxxx
\n
"
else
:
if
instr
.
imm
!=
""
:
if
instr
.
imm
!=
None
:
instr
.
rs2
=
f
"rs2: xxxxxxxx [xx] i_imm:
{
int
(
instr
.
immb
,
2
)
:
04
x
}
"
else
:
instr
.
rs2
=
f
"rs2:
{
rs2Val
}
[
{
int
(
instr
.
rs2b
,
2
)
}
] i_imm: xxxx"
...
...
@@ -37,7 +37,7 @@ def display():
rs1
=
f
"rs1: xxxxxxxx [xx] "
return
f
"PC:
{
pc_val
:
08
x
}
, IR:
{
instr
.
val
:
08
x
}
,
{
instr
}
\n
"
+
\
f
"rd:
{
RF
.
read
(
int
(
instr
.
rdb
,
2
))
}
[
{
int
(
instr
.
rdb
,
2
)
}
] "
+
rs1
+
instr
.
rs2
+
\
f
" op:
{
int
(
instr
.
opcode
,
2
)
:
x
}
func3:
{
int
(
instr
.
funct3
)
}
func7:
{
int
(
instr
.
funct7
)
}
"
+
\
f
" op:
{
int
(
instr
.
opcode
,
2
)
:
x
}
"
+
\
f
" alu_fun:
{
alu_str
}
\n
"
startup
=
True
...
...
@@ -64,9 +64,6 @@ for t in itertools.count():
if
instr
.
rs2
!=
None
:
rs2Val
=
RF
.
read
(
int
(
instr
.
rs2b
,
2
))
if
instr
.
name
==
"li"
:
instr
.
name
=
"addi"
alu_fun
=
control
[
instr
.
name
].
ALU_fun
alu_str
=
control
[
instr
.
name
].
renums
[
"ALU_fun"
][
getattr
(
control
[
instr
.
name
],
"ALU_fun"
)]
op1_sel
=
control
[
instr
.
name
].
op1_sel
...
...
@@ -83,7 +80,10 @@ for t in itertools.count():
op2
=
op2Mux
(
op2_sel
)
aluVal
=
alu
(
op1
,
op2
,
alu_fun
)
print
(
instr
.
name
)
if
rf_wen
:
print
(
instr
.
rdb
)
RF
.
regs
[
int
(
instr
.
rdb
,
2
)]
=
aluVal
# print one line at the end of the clock cycle
...
...
riscv_isa/isa.py
View file @
563779f2
...
...
@@ -71,7 +71,7 @@ class Instruction():
self
.
name
=
None
;
self
.
type
=
None
#self.type = self.getType(self.binVal[25:])
self
.
immb
=
None
;
self
.
rs1b
=
None
;
self
.
rs2b
=
None
;
self
.
rdb
=
None
self
.
funct3
=
None
;
self
.
funct7
=
None
self
.
funct3
=
""
;
self
.
funct7
=
""
self
.
rd
=
None
;
self
.
rs1
=
None
;
self
.
rs2
=
None
;
self
.
imm
=
None
self
.
i_imm
=
self
.
val
&
INST_IMM_ITYPE_MASK
self
.
u_imm
=
self
.
val
&
INST_IMM_UTYPE_MASK
...
...
@@ -100,6 +100,8 @@ class Instruction():
if
self
.
type
==
"I"
:
#self.funct7 = "0"
self
.
rdb
=
self
.
binVal
[
20
:
25
]
#rd reg in binary
self
.
rd
=
regNumToName
(
int
(
self
.
rdb
,
2
))
#rd reg
self
.
immb
=
self
.
binVal
[:
12
]
#immediate in binary
self
.
imm
=
twos_comp
(
int
(
self
.
immb
,
2
),
len
(
self
.
immb
))
self
.
rs1b
=
self
.
binVal
[
12
:
17
]
#reg rs1 in binary
...
...
@@ -115,10 +117,10 @@ class Instruction():
elif
(
self
.
opcode
==
"1110011"
)
and
(
self
.
funct3
==
"000"
):
return
"ecall"
if
self
.
funct3
==
"000"
:
if
self
.
rs1
==
"zero"
:
return
"li"
else
:
return
"addi"
#
if self.rs1 == "zero":
#
return "li"
#
else:
return
"addi"
elif
self
.
funct3
==
"001"
:
return
"slli"
...
...
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