Commit 4ef4189d authored by Christina Yu's avatar Christina Yu
Browse files

lab7

parent 9b3329a1
#alu.py
from pydigital.utils import sextend
from pydigital.utils import sextend, as_twos_comp
alu_ops = ['X','^','cp','sltu', 'and', 'add', 'slt', 'sra', 'sub', 'srl', 'sll', 'or']
def add(op1, op2):
if op1 == -0x7fffff60:
print('dfsa')
return op1 + op2
def alu(op1, op2, alu_fun): # operation determined by the input alu_fun
if alu_fun == 0: # 0 (no operation)
return 0
if alu_fun == 1: #Xor
return op1^op2
if alu_fun == 2: #Copy (input 1 copied to output)
return op1
return (op1)
if alu_fun == 3: #Sltu (shift left unsigned)
return op1*(2**op2)
return int(as_twos_comp(op1) < as_twos_comp(op2))
if alu_fun == 4: #And
return op1&op2
if alu_fun == 5: #Add
return add(op1, op2)
return (op1)+(op2)
if alu_fun == 6: #Slt (set less than)
return int(op1<op2)
if alu_fun == 7: #Sra (shift right arithmetic)
......@@ -30,7 +25,7 @@ def alu(op1, op2, alu_fun): # operation determined by the input alu_fun
if alu_fun == 9: #Srl (shift right logical)
return (op1)>>op2
if alu_fun == 10: #Sll (shift left logical)
return sextend((op1) << op2)
return sextend(0xffffffff & (op1 << op2))
if alu_fun == 11: #Or
return op1|op2
return
......
......@@ -92,7 +92,7 @@ for t in itertools.count():
###################################################################################
# decode
if instr.name in ["CSRRS", "CSRRW"]:
if instr.name in ["CSRRS", "CSRRW", "CSRRSI"]:
print(f"{t:20d}:", display())
PC.clock(pc_val + 4)
continue
......@@ -176,10 +176,10 @@ for t in itertools.count():
DM.mem[symbolTable['fromhost']] = 1
wdMux = lambda x: [pc_val + 4, aluVal, rData][x]
wd = wdMux(wb_sel)
wd = (wdMux(wb_sel))
# writeback
rd = int(instr.binVal[20:25], 2)
rd = (int(instr.binVal[20:25], 2))
RF.clock(rd, wd, rf_wen)
# print one line at the end of the clock cycle
......@@ -189,6 +189,13 @@ for t in itertools.count():
if instr.name == 'ecall':
if RF.read(10) == 1:
print(f"ECALL({RF.read(10)}): {RF.read(11)}\n")
if RF.read(17) == 0x5d:
status = "TEST PASS" if RF.read(10) == 0 else "TEST FAIL"
RF.display()
if status == "TEST FAIL":
exit(1)
if status == "TEST PASS":
exit(0)
elif (RF.read(10) == 0) or (RF.read(10) == 10):
strr = f"ECALL({RF.read(10)}): "
if RF.read(10) == 10:
......
......@@ -111,8 +111,6 @@ class Instruction():
self.rs1b = self.binVal[12:17] #reg rs1 in binary
self.rs1 = regNumToName(int(self.rs1b, 2)) #reg rs1
self.funct3 = self.binVal[17:20] #funct3 in binary
print(self.opcode, self.funct3, self.funct7)
#self.imm = str(int(self.immb, 2)) #convert integer binary to string
if self.opcode == "1100111":
return "jalr"
......@@ -188,7 +186,7 @@ class Instruction():
self.rdb = self.binVal[20:25] #rd reg in binary
self.rd = regNumToName(int(self.rdb, 2)) #rd reg
self.immb = self.binVal[:20]
self.imm = twos_comp(int(self.immb,2), len(self.immb))
self.imm = int(self.immb,2)
#self.imm = str(int(self.immb, 2))
if self.opcode == "0110111":
return "lui"
......@@ -275,7 +273,7 @@ class Instruction():
return f"{self.name},\t{self.rd}, {self.rs1}, {self.rs2}"
elif self.type == "U":
return f"{self.name},\t{self.rd}, {self.imm}"
return f"{self.name},\t{self.rd}, {self.imm:08x}"
elif self.type == "S" or self.type == "SB":
return f"{self.name}\t{self.rs1}, {self.rs2}, {self.imm}"
......
import os, sys
if not sys.argv[1].endswith("\\"): sys.argv[1] += "\\"
if not os.path.isdir(sys.argv[1]):
exit("ERROR: provided path is not a directory")
for elf_file in os.listdir(sys.argv[1]):
print(f"TESTING: --- {elf_file}")
os.system(f"python onestage_elf.py {sys.argv[1]}{elf_file} -t -s")
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