Correcting the chown issue in script and adapting ByteSelector and SimpleALU... (5182351f) · Commits · Alan Marchiori / learning-journey

set-learning-journey.sh

+4 −2

Original line number	Diff line number	Diff line
		@@ -7,7 +7,9 @@
		# January 3rd, 2018 - adjusting verilator installation
		# - adjusting permissions automatically
		#
		# January 20th, 2016 - adapting the script to the learning-journey repo
		# January 20th, 2018 - adapting the script to the learning-journey repo
		#
		# January 21st, 2018 - correcting the chown issue
		#
		# Aleksandar Pajkanovic
		# aleksandar [dot] pajkanovic [at] gmail [dot] com
		@@ -52,7 +54,7 @@ do
		esac
		done

		export LJHOME=$pwd
		export LJHOME=$PWD
		echo "Home of Learning Journey set in \$LJHOME"

		# Check for dependencies and install those that are missing

src/main/scala/examples/ByteSelector.scala

+19 −17

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		// See LICENSE.txt for license details.
		// January 21st, 2018 - adapting to Learning Journey

		package examples

		import chisel3._
		import Chisel._

		class ByteSelector extends Module {
		val io = IO(new Bundle {
		val in = Input(UInt(32.W))
		val offset = Input(UInt(2.W))
		val out = Output(UInt(8.W))
		})
		io.out := 0.U(8.W)
		when (io.offset === 0.U(2.W)) {
		io.out := io.in(7,0)
		} .elsewhen (io.offset === 1.U) {
		io.out := io.in(15,8)
		} .elsewhen (io.offset === 2.U) {
		io.out := io.in(23,16)
		val io = new Bundle {
		val in = UInt(INPUT, 32)
		val offset = UInt(INPUT, 2)
		val out = UInt(OUTPUT, 8)
		}
		io.out := UInt(0, width = 8)
		when (io.offset === UInt(0)) {
		io.out := io.in(7,0) // pull out lowest byte
		} .elsewhen (io.offset === UInt(1)) {
		io.out := io.in(15,8) // pull out second byte
		} .elsewhen (io.offset === UInt(2)) {
		io.out := io.in(23,16) // pull out third byte
		} .otherwise {
		io.out := io.in(31,24)
		io.out := io.in(31,24) // pull out highest byte
		}
		}

src/main/scala/examples/SimpleALU.scala

+30 −29

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		// See LICENSE.txt for license details.
		// January 21st, 2018 - adapting BasicALU to Learning Journey
		package examples

		import chisel3._
		import Chisel._

		class BasicALU extends Module {
		val io = IO(new Bundle {
		val a = Input(UInt(4.W))
		val b = Input(UInt(4.W))
		val opcode = Input(UInt(4.W))
		val out = Output(UInt(4.W))
		})
		io.out := 0.U //THIS SEEMS LIKE A HACK/BUG
		when (io.opcode === 0.U) {
		io.out := io.a //pass A
		} .elsewhen (io.opcode === 1.U) {
		io.out := io.b //pass B
		} .elsewhen (io.opcode === 2.U) {
		io.out := io.a + 1.U //increment A by 1
		} .elsewhen (io.opcode === 3.U) {
		io.out := io.a - 1.U //increment B by 1
		} .elsewhen (io.opcode === 4.U) {
		io.out := io.a + 4.U //increment A by 4
		} .elsewhen (io.opcode === 5.U) {
		io.out := io.a - 4.U //decrement A by 4
		} .elsewhen (io.opcode === 6.U) {
		io.out := io.a + io.b //add A and B
		} .elsewhen (io.opcode === 7.U) {
		io.out := io.a - io.b //subtract B from A
		} .elsewhen (io.opcode === 8.U) {
		io.out := io.a < io.b //set on A less than B
		val io = new Bundle {
		val a = UInt(INPUT, 4)
		val b = UInt(INPUT, 4)
		val opcode = UInt(INPUT, 4)
		val output = UInt(OUTPUT, 4)
		}
		io.output := UInt(0)
		when (io.opcode === UInt(0)) {
		io.output := io.a // pass A
		} .elsewhen (io.opcode === UInt(1)) {
		io.output := io.b // pass B
		} .elsewhen (io.opcode === UInt(2)) {
		io.output := io.a + UInt(1) // inc A by 1
		} .elsewhen (io.opcode === UInt(3)) {
		io.output := io.a - UInt(1) // inc B by 1
		} .elsewhen (io.opcode === UInt(4)) {
		io.output := io.a + UInt(4) // inc A by 4
		} .elsewhen (io.opcode === UInt(5)) {
		io.output := io.a - UInt(4) // dec A by 4
		} .elsewhen (io.opcode === UInt(6)) {
		io.output := io.a + io.b // add A and B
		} .elsewhen (io.opcode === UInt(7)) {
		io.output := io.a - io.b // sub B from A
		} .elsewhen (io.opcode === UInt(8)) {
		io.output := (io.a < io.b) // set on A < B
		} .otherwise {
		io.out := (io.a === io.b).asUInt //set on A equal to B
		io.output := (io.a === io.b) // set on A == B
		}
		}

src/main/scala/problems/LFSR16.scala

+9 −12

Original line number	Diff line number	Diff line
		// See LICENSE.txt for license details.
		// January 21st, 2018 - adapting to Learning Journey
		package problems

		import chisel3._
		import Chisel._

		// Problem:
		//
		@@ -10,14 +11,10 @@ import chisel3._
		// State change is allowed only when 'inc' is asserted
		//
		class LFSR16 extends Module {
		val io = IO(new Bundle {
		val inc = Input(Bool())
		val out = Output(UInt(16.W))
		})

		// Implement below ----------

		io.out := 0.U

		// Implement above ----------
		val io = new Bundle {
		val inc = Bool(INPUT)
		val out = UInt(OUTPUT, 16)
		}
		// ...
		io.out := UInt(0)
		}